A new soldermask for Eurocircuits’ PCBs.

Last year we made one of the group’s largest investments by installing the Ledia direct imaging system in our plant in Eger – Hungary. We can use Ledia to expose inner layers, outer layers and soldermask as well. With the Ledia we can produce PCB’s with tighter tolerances on images and soldermask.

To better optimize all advantages that Direct Imaging of the soldermask with the Ledia has to offer, we needed to change the soldermask to another type. Still from the same supplier, Sun Chemicals, CAWS2708 LDI is better suited for the Ledia’s imaging process.

With this new, professional and reliable soldermask, we can expose our production panels faster than with the previous type. In combination with Direct Imaging, we can also achieve much better results on registration accuracy.

The surface of the new soldermask is perfect for soldering. The matt finish helps with the alignment for placing components and it is better suited for automatic optical inspection after soldering. We are convinced that this soldermask is a modern and user-friendly product.

  

We made lot’s of tests with the new soldermask and all test results were very convincing. The many micro sections we have made, show that the thickness and coverage of the soldermask are also very good. We measured at least 10 micron of soldermask on the edges of the tracks.

The left picture shows the solder mask we use in Eurocircuits Eger and the right picture shows the soldermask of Eurocircuits Aachen.

 

In Eurocircuits Aachen we are using the sister product of the CAWS2708 LDI of Sun Chemical. The CAWN2295 used in Aachen has the same RAL colour of the one in Eger and has the same technical features. Nevertheless, there will be optical differences between the two because of the different application method. We use curtain coating in Germany and spray coating in Hungary.

The physical and chemical properties of both soldermask types are the same after the curing process and both have very good electrical properties. Last but not least we can state that the new soldermask has excellent characteristics for the adhesion to the copper surface.

To summarize we can conclude that the new soldermask types we use in Eger and Aachen have better characteristics than what our customers were used to before although they might look a bit different than the previous types.

Eurocircuits install Ledia V5 Direct Imaging (DI)

In January we made one of our largest investments in a single piece of machinery when we installed a Ledia V5 direct imaging system from Japanese image-processing company Screen.

Our commitment to the European engineering design community demands continuous investment in new production technology. When you need a new PCB technology we must have the necessary manufacturing processes in place. For example, fine-pitched components (BGAs etc.) require increasingly fine soldermask dams between pads to minimize the risk of solder shorts. The Ledia V5 allows us to offer finer dams than are possible with conventional imaging technology.


The Ledia V5 will also give us

  • shorter process times and more capacity. That way we keep fast deliveries on time.
  • more pooling service opportunities to help you keep your costs down.

What is Direct Imaging?

Traditional PCB imaging systems expose photosensitive etch and plating resists and soldermask inks using film-based phototools. Direct imaging systems cut out the phototool and use scanning technology to “write” the image directly onto the resist.

The success of the new technology can be seen from equipment sales within the PCB industry: since 2010 Direct Imaging systems have outsold the traditional phototool-based exposure systems by 3 to 1.

What are the benefits of the Ledia V5?

We will use Ledia for inner layers, fine-line outer layers and tight-toleranced soldermasks.

The Ledia V5 direct imaging system installed in the yellow room in our plant in Eger.

1. Higher quality imaging, especially of fine-line PCBs

1.1. More accurate imaging of fine tracks and fine features.

The Ledia V5 uses a more coherent light source than conventional exposure systems. The LEDs can be fine-tuned to give a more precise polymerization of photosensitive resists and inks. Using Ledia V5 we can image fine lines and features on PCBs more accurately and more reliably than before.

1.2. Better registration allows tighter tolerances on outer layers and soldermasks.

Conventional exposure systems use fixed phototools. Designers must reduce packing densities on multilayer PCBs to accommodate the process tolerances on the phototool as well as the tolerances required by PCB manufacture. Multilayer bonding in particular can introduce linear and non-linear distortions in production panels. These distortions are difficult to predict as they depend to a large extent on the copper layout itself.

Direct Imaging brings two advantages: it eliminates the tolerances required by the phototool, and it allows dynamic registration on each production panel. Thus the Ledia V5 automatically aligns the image to each drilled panel, and then uses fiducials to compensate the image “on-the-fly” for any linear or non-linear distortion in the panel. Even on large pooling panels fine-line circuits can be registered individually without loss of throughput. Image compensation allows successful imaging of tighter-toleranced PCBs with higher packing densities.

2. Tighter toleranced soldermasks for fine-pitched components (BGAs etc.)

Higher quality imaging and more precise registration means that we can image soldermasks with tighter tolerances.

This allows

  • designs with higher packing densities. Smaller soldermask windows allow smaller gaps between copper pads and adjacent tracks
  • more reliable soldering at board assembly. Ledia can image finer soldermask dams between fine-pitch pads to prevent solder shorts.

3. More plant capacity for faster and more reliable deliveries.

Direct imaging cuts out the process steps needed to plot, inspect and register phototools as well as to register them onto the exposure units. As we specialize in prototype and small batch orders we need to process tens of thousands of phototools annually (in 2014 at our Eger plant we used 36,000 films for imaging and 25,000 films for solder mask). Reducing these figures, perhaps by as much as two-thirds, will shorten our production cycle and increase plant capacity, meaning faster and more reliable deliveries, especially for 2 – 3 day jobs.

4. Minimum disruption to production and to processes.

The first Direct Imaging systems used UV lasers, but, as its name suggests, the Ledia 5V uses high-intensity LEDs. The peak efficiency of a UV laser falls within a very narrow frequency band, so DI systems using UV lasers need special resists. The Ledia V5’s LEDs have a broader frequency range so that we can continue to use our existing resists and soldermask inks. This makes Ledia 5V a “drop-in” upgrade to our existing imaging processes. So no time lost evaluating and approving new processes; there is minimum disruption to production – and our customers don’t need to re-qualify our soldermasks.

What about UL ?

What is UL?

The Underwriters Laboratory (UL) was set up around 120 years ago in the USA as an independent facility to test the safety of new products and new technologies.  Today it has a network of sites around the world focussed on product safety.  It test products, certifies manufacturers, and produces and updates safety standards across a broad range of industrial and commercial sectors. More.

For PCBs the main standards are UL 796, the specific PCB standard, and UL 94 for flammability testing of all plastics.  These specify a number of performance tests to measure the long-term reliability and fire safety of the PCB.  If a board is released to these standards, it is marked with the UL logo, the fabricator’s logo and the board type.  So here for Eurocircuits, we see on the left the UL logo, then Eurocircuits’ UL trademark, and last ML for “multilayer”.

UL on the PCB

When is UL marking used?

UL marking is required whenever safety, especially flammability, is a critical issue.  For European OEMs it is often required on any boards that go into equipment that will be imported into the USA.  The requirement may be set by the OEM or by the end customer.

What does UL marking mean?

  1. The base material meets the specified flammability level laid down in UL94.  For FR4 the level required is UL94 V0.  This means that when a vertical sample of the material is introduced into the test flame and then removed, it will self-extinguish within 10 seconds.  It will not drip flaming particles.
    All Eurocircuits FR4 materials meet the requirements of UL 94 V0.  For boards requiring UL marking we use Isola and Nan Ya materials

    • For STANDARD pool multilayer boards we use IS400 Mid Tg 150°C (this Tg is higher than standard FR4 to ensure full compatibility with lead-free soldering).
    • For all high Tg (170° – 180° C) requirements we use Isola PCL-FR4-370-HR.
    • For one and two layer boards we use IS400 Tg 150°C or Nan Ya NP-155F Tg 150°C
      => For more information on their properties see UL Certificate E41625 for Isola materials and E98983.

  2. The base material meets the specified level for ability to resist ignition from electrical sources.  For the values see E41625 and E98983.
  3. The base material meets the specified electrical breakdown (tracking) or Comparative Tracking Index (CTI) value.  This is the voltage difference at which the insulation properties of the base material may break down, causing safety and performance issues.  The Isola and Nan Ya FR4 materials meet the requirements of Class 3 (175 – 249 V).
  4. The base material meets the performance profile levels specified for direct support of current carrying PCBs (DSR).  These are specified in UL Standard ANSI/U/796A.
  5. The boards meet the other specifications set out in the table under UL marking in STANDARD pool below.

Eurocircuits UL specs

Our UL certificate E142920 can be found on the UL website

Abbreviations used.

    • Cond = conductor
    • Edge: this is explained below
    • Thk = thickness
    • SS = One copper-clad side
    • DS = Two copper clad sides including single-sided and multilayer
    • DSO = Double-sided only
    • Max Area Diameter: this is explained below
    • Meets UL796 DSR requirement.  See item 4 above.
    • CTI = Comparative Tracing Index.  See item 3 above.

TIPS.

      1. UL marking is free of charge.
      2. To add UL marking to your order, click on “Advanced options” at the bottom of the Price calculator menu, and then tick the “UL marking” box.  The smart Price calculator menu will flag any options that are not UL-compatible.
      3. When data has been uploaded, the Marking editor can be used to define the UL logo position.

General.

      1. All boards requiring UL marking are made in our factory in Eger, Hungary.
      2. We offer UL marking in STANDARD pool only.
      3. We have 3 active board classes, each with its own UL marking:
        1. i. Multilayer boards: designator ML; marking:
          UL ML
        2. ii. 1- and 2-layer boards with minimum thickness 0.63 mm: designator DV; marking:
          UL DV
        3. iii. 1- and 2-layer boards with thickness 0.38 mm – 0.62 mm: designator DS; marking:
          UL DS

The other classes listed in the certificate are no longer used.

UL marking in STANDARD pool

UL marking is only available for PCBs which are conform to the parameters listed here (the numbers in brackets indicate more information below). This includes poolable and non-poolable options.

UL type Designator

ML

DV

DS

Usable for

Multilayer

Single and Double sided

Single and Double sided

Base Materials

IS400

PCL-FR-370HR

IS400

NP-155F

PCL-FR-370HR

IS400

NP-155F

PCL-FR-370HR

UL 94 Flame Class

V-0

V-0

V-0

Min. build-up thickness (mm) (1)

0,63

0,63

0,38

Min. bonding sheet (prepreg) thickness (microns) (2)

126

Minimum outer layer conductor thickness (microns) (3)

18

18

18

Maximum inner layer conductor thickness (micron) (4)

70

Minimum track width (mm) (5)

0,10

0,10

0,10

Minimum edge track width (mm) (6)

0,15

0,15

0,15

Maximum conductor area diameter (mm) (7)

76,20

76,20

76,20

Surface finishes:

Leadfree HAL

Immersion NiAu (ENIG) (8)

Immersion Ag

Yes

Yes

Yes

Yes

Yes

Yes

Yes

NO

Yes

Hard gold edge connector

Yes

Yes

Yes

PTH on the board edge

Yes

Yes

Yes

Round-edge plating

Yes

Yes

Yes

Copper up to board edge (9)

NO

NO

NO

Carbon paste

Yes

Yes

Yes

ViaFill (10)

Yes

Yes

NO

Heatsinkpaste (11)

NO

NO

NO

Soldermask types (12)

ELPEMER 2467

XV501T Screen XV501T-4 Screen

ELPEMER 2467

XV501T Screen XV501T-4 Screen

ELPEMER 2467

XV501T Screen XV501T-4 Screen

Hole plugging material (ViaFill)

XV501T-4 Screen

XV501T-4 Screen

Peelable soldermask

Yes

Yes

Yes

Carbon ink

SD 2841 HAL *IR

SD 2841 HAL *IR

SD 2841 HAL *IR

Solder limit

Maximum temperature (°C) (13)

265

265

265

Solder limit

Maximum time (sec) (13)

20

20

20

Maximum operating temp (°C)

130

130

130

1. Minimum build-up thickness (mm)

This is the thickness of the PCB measured over the laminate where there is no internal or external copper.

The minimum  STANDARD pool thicknesses which can be UL marked are:

UL-ML

UL-DV

UL-DS

UL min. build-up thickness (mm)

0,63

0,63

0,38

Min. STANDARD pool thickness (mm)

0.80

0.80

0.50

TIP

For UL marking of UL-DS PCBs the surface finish must be Che Ag or No surface finish (leadfree/leaded HAL is not possible due to the min board thickness requirement of 0.80mm for HAL and Che Ni/Au is not available for UL-DS-marked PCBs due to the fact that we always use  a via-fill in combination with Che Ni/Au).

2. Minimum bonding sheet (prepreg) thickness (microns)

Minimum prepreg thickness in a multilayer. This may be one prepreg or a combination of different prepreg.

UL-ML

UL-DV

UL-DS

UL min. bonding sheet (prepreg) thickness (microns)

126

In STANDARD pool most of the 700+ pre-defined builds meet this requirement. The smart Price calculator menu will flag any pre-defined build that is not UL-compatible.

3. Minimum outer layer conductor thickness (microns)

Specifies the minimum END copper thickness for the outer layers.

UL-ML

UL-DV

UL-DS

UL min. outer layer conductor thickness (microns)

18

18

18

For 2-layer and multilayer boards all start copper foil thicknesses may be used: 12µm (end +/-30µm), 18µm (end +/-35µm), 35µm (end +/-60µm), 70µm (end +/-95µm) and 105µm (end +/-130µm).

For 1-layer boards the start copper foil is the same as the end copper thickness, so following start copper foils are available: 35µ (end +/-35µm), 70µm (end +/-70µm) and 105µm (end +/-105µm).

4. Maximum inner layer conductor thickness (micron)

Specifies the maximum END copper thickness for the inner layers.

UL-ML

UL-DV

UL-DS

UL max. inner layer conductor thickness (micron)

70

On inner layers start copper foil is the same as end copper thickness.  UL marking is available only for 12µm, 18µm, 35µm and 70µm (not 105 µm)

5. Minimum standard track width (mm)

The minimum width of any track on any layer placed more than 0.40mm from the edge of the board.

UL-ML

UL-DV

UL-DS

UL min. standard track width (mm)

0,10

0,10

0,10

eC PCB Classification pattern class

Class 8

Class 8

Class 8

6. Minimum edge track width (mm)

The minimum width of any track on any layer placed less than 0.40mm from the edge of the PCB-board.

UL-ML

UL-DV

UL-DS

UL min. edge track width (mm)

0,15

0,15

0,15

eC PCB Classification pattern class

Class 6

Class 6

Class 6

This is a UL requirement to prevent damage to fine tracks near the edge of the PCB.

TIPS.

  1. Eurocircuits’ standard specifications still apply.  If a PCB is break-routed, there can be no copper on the outer layer within 0.25 mm of the edge of the board or 0.40 mm on the inner layer.  For V-cut scoring the clearance must be 0.45 mm on all layers.
  2. Copper up to the board edge is not allowed under UL rules – see (9) below.

7. Maximum conductor area diameter (mm)

This specifies the maximum solid, unpierced conductor area on any layer of a PCB-board, measured by the diameter of the largest circle that can be inscribed within the conductor pattern.

UL-ML

UL-DV

UL-DS

UL max. conductor area diameter (mm)

76,20

76,20

76,20

A “solid, unpierced copper area” is defined as any “full” or “solid” copper plane that does not have any PTH or NPTH holes in it.  This rule has been introduced by UL to reduce the thermal mismatch between a large solid copper plane and the laminate.

The diameter is measured thus:

UL maximum copper area

TIP

In most cases copper planes will include clearances for drill holes and so are not solid.  Otherwise if UL marking is required for designs with very large unbroken copper areas, consider using cross-hatching.

8. Surface finish – Immersion NiAu (ENIG)

To ensure optimum quality on immersion nickel-gold PCBs with closed vias we use ViaFill. As we do not offer UL marking on ViaFill for boards less than 0.63 mm thick, we cannot offer UL marking on type UL-DS PCBs (less than 0.63 mm).

9. Copper up to board-edge

This is not permitted under UL rules (risk of exposed or torn copper).

10. ViaFill

We do not offer UL marking for ViaFill for boards less than 0.63mm thick.

11. Heatsinkpaste

We do not offer UL marking for heatsinkpaste.

12. Soldermask types

All colours that we offer are covered.

13. Solder limit – temperature and time

These are the values that we use in our quality checks.

If you have any questions, please contact us by email at

euro@eurocircuits.com

This e-mail address is being protected from spambots. You need JavaScript enabled to view it

or use our online Chat.

RoHS and lead-free compliance

What is RoHS?

RoHS regulations are designed to limit or eliminate substances that are dangerous to the environment and to people. Inadequately treated e-waste poses environmental and health risks. The RoHS directive is also meant to increase the amount of e-waste that is appropriately treated and to reduce the volume that goes to disposal.

RoHS (Restriction of Use of Hazardous Substances) regulations limit specific substances – lead, cadmium, polybrominated biphenyl (PBB), mercury, hexavalent chromium, and polybrominated diphenyl ether (PBDE) flame retardants – in electrical and electronic equipment.

Does RoHS affect the quality of PCBs?

RoHS is not a quality standard, and the simple fact that boards are RoHS compatible does not add to the quality of the board. RoHS, or more familiar ‘lead-free’ does have serious effect on PCB fabrication and soldering. The fact that boards are soldered at higher temperatures requires changes in the PCB manufacturing process. New FR-4 materials are developed to withstand the higher temperatures without reducing the lifetime of the final product. More info can be found in our article about lead-free soldering

RoHS and RoHS2 directives

The European Parliament and the Council of the European Union created a program that standardizes the restriction and use of hazardous substances within the EU while contributing to the protection of human health and the environment. The EU has published Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment and Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (recast). These directives are commonly referred to as the RoHS and RoHS2 directives.

What is RoHS compliance? – RoHS declaration

RoHS compliance means acting in full accordance with RoHS regulations.

DECLARATION

According to RoHS directive 2011/65/EC hereby we declare that the Printed Wire Boards produced by EUROCIRCUITS do not contain more than the allowed quanitity of the following materials This jugment is based on the manufacturer”s classification. This declaration is valid for all printed circuits produced in Eurocircuits Kft – Eger, Hungary, Eurocircuits Aachen GmbH- Kettenhausen and Eurocircuits India Ltd – Gandhinagar

  • Lead (Pb) (excess tolerance-limit)
  • Mercury (Hg)
  • Cadmium (Cd)
  • Hexavalent Chromium
  • PBB
  • PBDE

For Eurocircuits ,

Lengyel Norbert

Quality Assurance manager

Gold plating for edge connectors

Gold plating over edge connectors

Eurocircuits offer two types of gold finish: Electroless Nickel Immersion Gold (ENIG) as a surface finish for the whole PCB, and hard plated gold over plated nickel for edge-connector fingers. Electroless gold gives excellent solderability, but the chemical deposition process means that it is too soft and too thin to withstand repeated abrasion. Electroplated gold is thicker and harder making it ideal for edge-connector contacts for PCBs which will be repeatedly plugged in and removed.


Technology

We plate the hard gold onto the PCBs after the soldermask process and before we apply the surface finish to the rest of the board. Hard-gold plating is compatible with all the other surface finishes we offer.

We first plate 3 – 6 microns of nickel onto the edge connector fingers and then on top of that 1 – 2 microns of hard gold. The plated gold is not 100% pure; it contains some cobalt to increase the wear-resistance of the surface.

We normally bevel the edge connectors to ensure easy insertion. Bevelling can be specified in the order details.

To make sure that the gold fingers align exactly with the edge-connector profile, we rout the vertical edges of the connector on the first drill run. The edges of the connector are then exactly aligned to the printed image.

In some cases one or more gold fingers are shorter than the rest, so that the longer pads connect first when the PCB inserted into the connector. This means that the shorter pads cannot be connected vertically to the plating bar. They have to make the connection needed for electroplating in another direction (see illustration. Here the blue lines represent the profile added at first drill stage and the green the final profiling).

After plating we check the adhesion of the plated nickel and gold with an industry-standard tape-test. We measure the thickness of the plated layers with a non-destructive X-ray measuring machine.

Limitations of the technology

  • The plated pads have to be on the edge of the PCB, as this is an electroplating process. There has to be an electrical connection between the plated pads and the production panel frame.
  • The maximum length of the plated pads is 40 mm as we use a standard shallow plating bath .
  • Inner layers have to be free of copper at the edge of PCB. Otherwise the bevelling could expose the copper.
  • If you want your PCBs delivered in a customer panel, the panel frame/border must be open on the edge connector side to allow us to make the connection for electroplating.
  • We can plate hard gold on two sides of PCB. But if the connectors are on the opposite sides of the PCB there has to be a minimum 150 mm between them.
  • To ensure optimum quality surface-finish, do not place any plated holes (PTH), SMD or other pads closer than 2.00 mm (80 mil) to the gold fingers – see drawing.

Soldermask on via-holes in case of chemical Nickel-Gold surface finish

Soldermask on via holes

There are 3 ways our customers prepare their layouts with respect to covering via-holes with soldermask:

  • Vias open (not covered by soldermask) on both sides of the PCB
  • Vias closed (covered with soldermask) on both sides of the PCB
  • Vias open from one side and covered from the other side of the PCB

As necessary background information we need to briefly introduce you into the technology of applying soldermask to the boards.


  • First we cover the whole surface of the production panel with soldermask ink and then dry the panel (printing the soldermask)
  • The ink we use is a UV sensitive material. When exposed to UV-light, the ink will harden (exposing the soldermask)
  • Ink that is not exposed remains soft and can be washed away using a 1% alkalic solution (developing the soldermask)

The easiest production method is to have all vias open from both sides. The vias will be clean. They will not contain any contamination nor soldermask. The next picture shows vias free of soldermask. We did not expose the soldermask on the via pads so that it remains soft and is washed away during the developing process.

Another practical production method is where the vias are covered on both sides of the PCB. We expose the soldermask on both sides of the via-pad and via-hole so it will harden and stay on the via-pad and over the via-hole to close it. There is a risk however that (mostly in case of via-holes with a larger diameter) the via-hole is not completely covered and a small opening remains in the middle.

There is a danger that chemicals get stuck in these small openings during the processes that follow after the soldermask application. These chemical can contaminate and affect for instance the chemical Ni/Au process. A further danger exists that chemicals of the Ni/Au process remain in these openings and as they are agressive chemicals they might keep on reacting in the via hole years after the board has been produced causing possible failures in usage of the PCB in its application.

The third case (vias covered from one side and open from the other side of the PCB) is the most problematic in production. This design creates a pocket. We expose the soldermask from one side but not from the other side. This soldermask in the middle of the via-hole will only be half polymerised. During the baking process this material can come out of the hole from the open side and contaminate the copper surface and thus disturb the surface finishing process. The pictures below shows a typical failure.

Vias and Chemical Nickel-Gold (ENIG)

Vias that are not completely covered or not properly filled with soldermask may create “skip pads” in the ENIG process.

Till now we didn”t receive any reasonable explanation from our material suppliers nor did we found one elsewhere that reveals the source of this problem. However supplier advise and long term experience guide us to two possible solutions to avoid the issue:

  • Modify the layout so that all vias are open. Our engineers favour this solution. Sadly this is not always accepted by our customers or the design may not allow it.
  • Apply the soldermask after the ENIG process. This is a costly solution as all copper surfaces are gold-plated and the soldermask adhesion becomes worse.

For closed via-holes we have developed an alternative solution which avoids chemicals getting trapped in the partially closed via-holes during developing of the soldermask or during application of the Ni/Au. Before the coating the entire panel with soldermask we selectively print soldermask into the via holes using a stencil. During a second print run we then cover the whole panel. This way the via-holes are completely filled with soldermask. An even layer of soldermask now covers the via-holes leaving no pockets to hold residual chemicals. We have used this technique for over 6 months, and it has proved successful in dramatically reducing the number of skip pad problems.

The following movies show this process of via filling and soldermask printing.

Setting up the machine:

{flowplayer}http://www.eurocircuits.com/images/stories/Movies/02_set_the_stencil_on_the_frame.flv{/flowplayer}

Printing the soldermask into the via holes:

{flowplayer}http://www.eurocircuits.com/images/stories/Movies/09_printing_closer.flv{/flowplayer}

Result after filling the via holes:

{flowplayer}http://www.eurocircuits.com/images/stories/Movies/10_result_close.flv{/flowplayer}

Cover the panel with soldermask:

{flowplayer}http://www.eurocircuits.com/images/stories/Movies/12_SM_printing_closer.flv{/flowplayer}

Result after printing the soldermask:

Drying the soldermask layer:

{flowplayer}http://www.eurocircuits.com/images/stories/Movies/13_Pre-dry.flv{/flowplayer}

Elsyca Intellitool Matrix plating project

Eurocircuits”role in the project sets a new competitive standard

Making efficient pooling panels belongs to the core business of Eurocircuits. It is a necessity to ensure cost-effective production of prototypes or small batches.
Eurocircuits started as a trader of printed circuit boards in 1991. Soon after, in 1993 we got involved in production. It has been our aim from the start to use pooling techniques for a number of reasons :

  • Save cost by increasing production efficiency
  • Save the environment by reducing waste

The idea of making pooling panels was not new in 1993. On the Benelux market a dutch company was already successfully offering single sided boards in pooling since the eighties of the last century. For double sided boards however it was not that common yet.

When we introduced combination panels for double sided boards in our own production in Hungary there was a lot of resistance from the operators and from the production management. They saw the complexity of their job increase, and technological challenges had to be taken care of.

Now, almost 20 years later, most technology issues have been taken care of, except for one major area, the galvanic copper plating.

For this galvanic process, the design of the PCB plays a vital role in the outcome of the process. In pooling panels there is even an influence of the design of one board on the copper deposition on surrounding designs. That means that we have to be very careful how to build our panel layouts.

The restrictions in panel configuration create limitations that affect the efficiency in our production. As a producer you can look at this problem in two ways:

  • Focus on efficiency and accept uneven copper distribution. Also accept that the quality of the PCB”s produced for one customer can be influenced by the design of another pcb on the same pooling panel.
  • Focus on quality – stick to an even distribution and minimum copper plating thickness all over the panel. Accept that part of the panel surface gets lost because of extra copper areas and spacing introduced to balance out the galvanic layer. Also accept that not all jobs can be pooled with acceptable plating results.

Eurocircuits decided not to take any plating quality risks. We accepted the restrictions dictated by the plating process for a long time.The Elsyca Intellitool matrix copper plating is going to remove these restrictions.


Project partners :

Elsyca NV, Wijgmaal – Belgium
MacDermid Germany

Elsyca Intellitool plating – the concept

Elsyca Intellitool is a software controlled electroplating tooling concept developed by Elsyca. It reduces the pattern dependence of the deposited layer of copper on the boards. The main change from a standard plating cell is the introduction of a controllable grid ( matrix) of anode segments, at a small distance of the board to be plated.

The concept consists of 3 parts :

  • 1.A simulation and optimisation tool which is a further development of Elsyca Smartplate, a software we use at Eurocircuits to simulate the plating process and to decide if a pooling panel is fit for production or not. The simulation tool optimizes the current on each anode segment in time to yield the desired plating thickness and uniformity on the board. The simulations counts with parameters like properties of the plating tank, design of the pcb, resisitivity of the substrate. The result of the optimization is sent to the control unit to feed the matrix.
  • 2.The matrix feeder contains a microprocessor that reads the calculated pattern of the current, and controls a matrix of digital to anode converters (DACs). This imposes the correct current on each anode segment ( pin). An amplification of the current can be implemented.
  • 3.The anode matrix, mounted on a printed circuit board. Each anode pin is connected to the matrix feeder.

Intellitool concept picture

Elsyca Intellitool is organising the anodes as a matrix with the same size as the panel to be plated, and every point in the matrix can plate with a different current. All individual currents can be controlled in time and intensity.This way the current density is not spread evenly over the panel, but is adjusted to the differences in copper distribution in the pcb design. This can be useful to balance differences in copper distribution within a single board, but gets even more interesting when there are different designs combined on one panel ( pooling-panel).

More information about the Elsyca Intellitool concept is available on their website

Elsyca Intellitool – in practice.

Eurocircuits is using the software from Elsyca to simulate plating (Smartplate) and judge the plating feasabilty of its pooling panels. Intellitool is going to take us a step further. We are not going to use the software just for making a judgment. The results of the simulations will be used to control the plating process by instructing each of the anodes in the matrix on the current to be used and the time to be plated.

The Elsyca Smartplate CAM output is sent directly from our UCAM Cam system to the plating line to control the process. Operator influence on the process will be eliminated.

Our plating process will be integrated in our production processes in a similar way as is now the case for CNC machines, test equipment, etc.

Elsyca Intellitool – labo test

To test the concept Elsyca made a labo plating setup. You can read an abstract of the concept and the labo test results

Elsyca Intellitool – testing in a production environment

Eurocircuits and Elsyca are testing the Elsyca Intellitool concept in a purpose built galvanic cell in our production site Eurocircuits Aachen Gmbh in Baesweiler, Germany.

The galvanic cell is built to treat one standard size Eurocircuits pooling panel ( 530 x 460 mm ) The PCB pattern on the pooling panel will vary from one production run to another.

Intellitool test cell

The cell contains two anode arrays ( one for the front side, one for the backside of the pcb panel)

Intellitool matrix

The tank is filled with MacDermid specialised chemicals for electroplating printed circuit boards, and the Eurocircuits pooling panel is precisely positioned between the two anode arrays.

Intellitool with panel positioned

Testing the Elsyca Intellitool production cell – November 17-2011

On November 17 tests with production panels taken out of regular production batches in Eurocircuits Aachen were plated in both our conventional plating line and in the Intellitool testcell.

Trials were conducted to evaluate the Intellitool concept as follows :

1. Test to improve the copper distribution on the panel against the conventional line :

  • Intellitool panel : Plating thickness (in holes ) between 33 and 53 micron
  • Conventional panel : Plating thickness (in holes) between 29 and 62 micron
  • The use of Elsyca Intellitool reduces the plating spread with 50%
  • Intellitool test 1

2. Test to speed up the plating process with similar copper distribution as in the conventional line

  • Intellitool panel : plating time 40 minutes
  • Conventional panel : plating time 70 minutes
  • The use of Elsyca Intellitool reduces the plating time with more than 40% while maintaining the same plating spread.
  • Intellitool test 2

More tests are planned to further optimize the Elsyca Intellitool product. As a lead customer this will be performed in close collaboration between Elsyca and Eurocircuits. By the end of February 2012 we will build a new galvanic line in our production unit in Eger, Hungary to test the Elsyca Intellitool in an automated production line.

 

 

Lean production project in Eurocircuits Kft – Eger – Hungary

Why lean production?

Our main target is reducing waste (time is a major waste) in the production and better (faster) serve our customers.

The first step – “clear the clouds”

We first needed to learn to see the real nature of our production processes. We learn to look through “lean glasses” to recognise the biggest waste items in our process. Waste can be waiting times between different processes, or stability problems in the process that create flow breakdowns.

Second step – list and analyse problems, set priorities

We formed a brainstorming team with colleagues from all areas in the company. The purpose of the sessions is to identify these areas in our process where we find important waste that can be cleared rather fast. We use Ishikawa root cause analysis for this.

During the brainstorming sessions we identified four areas where we think we can improve rapidly:


  1. Mechanical department
  2. Galvanic lines
  3. define KPI”s ( Key performance indicators)
  4. Priority settings
Four project teams are established. Every team got members from different areas to be able to look at the problem from different angles. Following the results of the root cause analysis we have set priorities. The priorities are decided based on resources needed to make a change and what effect the change can cause.

Creating a smooth production flow

When we have waves in our production this creates “traffic jams”. These jams are the main reason for delay. The best way to guarantee on-time delivery is by creating a smooth production flow. For that we need stable processes, a well balanced capacity distribution throughout the process, and skilled operators.

PCB production is a complicated process with a lot of different steps. Each order can be following a slightly different flow as different options are chosen. That makes is challenging to create a smooth flow. Most energy is spend in organizing the “human factor” – monitoring and motivating operators to think and act lean. Training is organised continually, and we try to involve people from all levels and all departments in the project.

New KPI”s (key performance indicators)

Existing KPI”s in the organisation are evaluated for their usefulness and following new KPI”s are introduced because we think they can inform us about our progress in this lean project.

  • KPI for measuring the average throughput time (in hours)
  • KPI”s measuring the efficiency in the galvanic process
  • KPI for measuring the efficiency in the drilling department.

FIFO

Beginning of October 2011 we started experimenting with a FIFO based system for setting priorities in each step of the production from the Blackhole PTH till the Soldermask curing step. As the first results are good we are now organizing to extend the reach of this FIFO method to the whole process of double sided production.

Controlled and decreased WIP (Work in Process)

We decreased and started to control the inventory of panels in production. Inventory is allowed only in clearly defined locations and up to a defined maximum number of panels. We produce in smaller lots based on the capacity of our bottleneck, the galvanic line. Jobs are started only for production when there is capacity available.

Panels waiting before the galvanic process before introduction of the WIP inventory control

Panels before the galvanic process with controlled inventory

As we are gaining more experience in the lean project, our confidence is growing that we can further increase efficiency and reliability. The knowledge built in the factory in Eger, Hungary will be useful when we start a new production unit in Gandhinagar India in 2012 to serve the Asian market with prototype pcb”s.