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Posted by Wim De Greve
Wim De Greve
Wim De Greve works on CAM-automation projects for Eurocircuits
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on Wednesday, 25 January 2012
in PCB Design

Plating simulation - our new tool for PCB designers

A simulation of the galvanic copper deposition in PCB manufacturing

Before we manufacture a PCB, we carefully analyse the data we receive to catch any potential production issues which may affect the quality and the long-term reliability of the finished product.  Any issues we find are reported back to the customer for discussion and resolution.

Until now galvanic plating is the one area where we have been unable to predict accurately how a particular design will perform.  The thickness of the plated copper deposited on any part of the board depends on the layout density.  If the density is low we risk over-plating; if the density is high we risk under-plating.  Over-plating (too much plated copper) means that component holes may become too small.  Under-plating (too little plated copper) may weaken the hole walls so that plated-through connections may crack during assembly and lose long-term reliability.

The goal is an even copper density and even plating across the PCB.  When we place PCBs on our production pooling panels we take this into account as far as we can.  We can also place extra copper patterns between or around the PCBs to even out the density (so-called robber bars).  However we can only go so far to achieve a uniform plating as we cannot modify the actual design of the PCB.  This can only be done by the designer.

Historically designers have had no tools to help them evaluate copper density.  Today Eurocircuits can offer a solution, an image of the board colour-mapped to show potential areas of over- and under-plating.

We use special plating simulation software which divides the board into small cells.  The copper density in each cell is compared with the average for the whole board and the cell is assigned a colour.  Lower than average copper density is coloured on a scale from green (average), through yellow and orange to red.  The more red, the lower the relative density and the higher the risk of over-plating in those areas.  Cells with a higher copper density are coloured on a scale from green to dark blue.  The more blue, the greater the risk of under-plating.

Armed with this visual data the designer can add copper areas where the density is low or reduce large plane areas .



We will also provide a plating index which measures the uniformity of copper density on the board.  A completely uniform board has an index of 1 which means that no plating problems are expected.  Lower values show less uniformity, highlighted on the visual image by the red and blue areas.  If the index falls to 0.4 or less, then special attention is required. In the example shown above the plating index is 0.30. The blue under-plated area is clearly visible.

These new tools can provide guidance for a designer.  We  provide the plating image when a new order is placed. This plating image is part of the PCB image - a realistic representation of your PCB that we send out together with your order confirmation. In the near future this plating simulation will become part of the Place Inquiry function.  We will run a full battery of manufacturability checks and produce a report.  We will also produce the plating image, so that the designer can see if he can make any changes to improve the uniformity of the plating.

After modifications the plating index is now 0.65. The picture shows a uniform plating.

Of course, there may be design constraints which make a less uniform copper density unavoidable.  Here we are rolling out a further solution to enhance the quality and reliability of the finished PCB.  The Elsyca Intellitool Matrix plating project will further enhance the uniformity of the final plating.

Wim De Greve works on CAM-automation projects for Eurocircuits


Practical Tools
Practical Tools
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Practical Tools Wednesday, 01 February 2012

Electrostatic discharge (ESD) is the sudden and momentary electric current that flows between two objects at different electrical potentials caused by direct contact or induced by an electrostatic field. The term is usually used in the electronics and other industries to describe momentary unwantedcurrents that may cause damage to electronic equipment.

ESD is a serious issue in electronics, suchas integrated circuits. Integrated circuits are made from semiconductor materials such as silicon and insulating materials like silicon dioxide. Either of these materials can suffer permanent damage when subjected to high voltages; as a result, there are now a number of antistatic devices that helpprevent static build up. Practical Tools offers acomplete line of ESD equipment and devices to help eliminate or control ESD events. Practical can provide workstation monitors, grounding equipment, mats, flooring, heel straps, wrist straps, ionization along with diagnostic and instrumentation equipment. Practical Tools offer ESD products and services from 3M, Botron and Credence Technologies.

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Ben Verwaest (ARCOSS BVBA) Monday, 13 February 2012

Jumping from Plating Simulation to ESD is a SPARK to far ? I don't see the relation ?
Electrostatic Discharge is indeed a serious problem. But what is the relation with this quality test ? If boards are manufactured with UNDER PLATING this is a weaker spot in the pcb which can be damage quicker by a SPARK, or a Reflowcycle or what so ever. So I think this is a perfect test to prevent pcb weakeness. A weak copper plating will be easier to damage also when the pcb is static charged. An uncontrolled discharge will be more harmfull to the weakest spot. It's to improve the Integrated circuits not to produce them with permanent ESD damage. A EPA zone (ESD Protected Area) is where bare boards are manufactured, assembled, soldered, repaired, .... .
Being in control is important. If persons or products are static charged we need to be in control and need to find a proper way to discharge. If copper on a pcb isn't in balance it's need to be controled, otherwise this can badly affect the assembly during the soldering process.

A crack caused by not enough copper, a bad soldering process or an ESD damaged track.
Onced it's there it's hard to get a good track back!

Goerg Thursday, 26 April 2012

You define a plating index. This I welcome as a very good and clever idea.
Additionally I'm interested to know what plating thickness differences are expressed by the colour schemes shown in the image. I clearly understand that blue means under plating and red over plating, but what is this in absolute µm of copper?

Dirk Stans Thursday, 26 April 2012

For the moment we have no idea about the resulting plating thickness in µm and this for 2 reasons:
1. The calculation is not based on the resulting plating thickness, but on the deviation of the local copper density against the average copper density of the board or panel. The deviation is an indication for over- and/or under plating.
2. In order to correctly calculate, we need not only a different algorithm (For the detailed plating behavior of our pooling production panels we use Smart Plate which does this job more detailed but cannot be performed on individual PCB images), but also the plating parameters used in the galvanic line (current, time, etc...). These parameters depend on the resulting production panel which is not known at this stage of the preparation process.
The conclusion is: We cannot specify the plating thickness in µm Cu for the different colors in the plating image. The colors only give an indication of the fact that there is a small or big deviation in plating thickness at a certain location.

Electronic City Friday, 24 August 2012

I actually think it's the best decision you could have taken and good to you that you decided doing this step. I've been watching your website for a while as I'm support PCB manufacture for beginners so I should be able to fairly judge the consequences of this bold change.
Best of luck, even though you do not look like needing :)

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