Eurocircuits and CadSoft run their first EAGLE workshop for electronics engineering apprentices.

On 29 – 30 January 2013 Eurocircuits and CadSoft organised a joint workshop on PCB design for engineering apprentices at SMA Solar Technology AG in Kassel, Germany.

SMA Solar Technology leads the market in Germany for solar power installations.  After surveying the market, they decided that all their electronics engineering apprentices should be trained on the EAGLE PCB Layout package.

Uwe Doerr from Eurocircuits started the January workshop with an illustrated presentation to the whole group of first and second year apprentices.  The presentation showed how we make 4-layer multilayers at our factories in Eger, Hungary, and Baesweller, Germany.  To make it even clearer and easier to understand, Uwe had brought along sample panels taken from the various production stages.

Eurocircuits is running production plants in Hungary an Germany. The capacity of both board-shops is sufficient for the European market and still leaves free capacity for the Eurocircuits business to grow.

Why did we step into a venture to build a brand new production facility in Gandhinagar, Gujarat, India?

We use our blog as a medium to provide useful information to the electronics engineering community. Most of our blog articles can be of interest for a long time after they are published, and we frequently got feedback from readers that they are not so easy to find back.

In the blog interface you have the possibilty to see the blogs organised in categories, you can see them organised according to tags attached to the blog article, or you can perform a search on keywords

A simple list of all articles, similar to a table of contents in a book can help to give you an idea what kind of information is available in our blog-posts. The following table shows the title of the blog, the publishing date, and the number of hits, to give you an idea of the popularity of the item.

Gold plating over edge connectors

Eurocircuits offer two types of gold finish: Electroless Nickel Immersion Gold (ENIG) as a surface finish for the whole PCB, and hard plated gold over plated nickel for edge-connector fingers. Electroless gold gives excellent solderability, but the chemical deposition process means that it is too soft and too thin to withstand repeated abrasion. Electroplated gold is thicker and harder making it ideal for edge-connector contacts for PCBs which will be repeatedly plugged in and removed.

The feedback we received on PCB Visualizer has been very encouraging. The tool is very much appreciated by engineers, and gives major advantages over conventional Gerber viewers.

For example, you can:

• Load all the data in a single .zip file
• Input native CadSoft EAGLE V6 .brd files as well as Gerber data
• See your PCB “live” as it will be produced instead of just a schematic visualization

And PCB Visualizer will:

• Automatically detect and register all layers.
• Check that your files and your order match up
• Compare the measured values for key production parameters with those of your chosen service.

We definitely made something better than a Gerber-viewer, but you want more... your feedback is clear enough:

PCB Visualizer, one week after the beta release

We have recieved plenty of feedback. Thank you for your support !

During the first week after the launch we got a lot of praise, comments, questions and suggestions.
The praise was sometimes overwhelming - you can still see the smile on our faces :-)

and sometimes more down to earth

Very motivating for us to work even harder to improve and extend the PCB Visualizer functionality. The current version is still in beta phase which means that we work on stabilizing the software, improve its performance and further develop the analysis algorithms to increase the reliability and accuracy. It is important for us to continue to recieve your feedback about how you experience the PCB Visualizer. Our priorities for further development are based on your reactions.

What we learned during the first week.

1. It's not clear what to do when the PCB Visualizer shows errors - can you proceed with your order?

• Whatever the result shown by PCB Visualizer, you can place the order. When the import of the files was successful and a red flag is showing in the order details, we advise to check your design and your order details to avoid that you will receive an exception further in the process.
• PCB Visualizer shows errors but you think your data was not analysed correctly. Please let us know through the feedback form what information is incorrect. We will analyse the problem and look for a solution. You can place your order, the data will be analysed by an operator independent from the PCB Visualizer result.
• Import failed  - PCB Visualizer works only based on Extended Gerber files as well as CadSoft EAGLE V6 files. All other file formats will result in an import failure. - However, you can place your order - older formats of CadSoft EAGLE as well as standard Gerber-files are still accepted.

2. From all our customers feedback, we learned that we need to improve on:

• PCB Contour recognition - improve the success rate on contour recognition. We will publish guidelines how you can define contours so PCB Visualizer can detect the correct contour more easily .
• Build-up recognition in case of single sided boards
• Make the results of PCB Visualizer also available after an order has been placed. You will therefore also find it in your running orders.
• Further extend the DRC functionalities. We show measured values now but not the location of the errors.
  We will build this functionality into a DRC check module that you can run after the PCB Visualizer is shown.
  We will keep you informed about the progress.
• Endless ' data loading - please wait' - message. PCB Visualizer is not always loading as expected. This behaviour seems to depend on operating systems
  as well as browsers. Make sure that you are using the latest versions of your browser, that your internet connection bandwidth is sufficient and
  that your firewall is not blocking .png images. We are exploring the reasons for this loading problem. When you are confronted with this,
  try if PCB Visualizer works from another PC or another location.

3. What to do with the information in the plating section?

• When we raise the red flag in the plating section of PCB Visualizer it does not mean that we cannot produce your boards.
  It means that the copper distribution over the surface of your board will not be even.
• The values give a degree of inbalance of copper distribution over the board.
• We do have possibilities to influence the plating when we construct the production panels and also during the production process,
  but the variation of copper thickness on your tracks and in the holes will be higher when the plating indexes are lower.
• Designing your board with the plating indexes in mind will result in a higher reliability of your boards.

To produce your board we use your design data in Gerber or EAGLE format and first perform the necessary front end actions as described in our white paper: "What do PCB fabricators do with your data before they make your PCBs?".

When this is done and your board is ready for production, we save your board’s production data in your account.  This data we call the job’s "single image" data.  “Single image” means the data we load onto our order-pooling production multi-panels, so it may refer to a single circuit image or to a delivery panel if this is what you have ordered. This is the data that is visualized in the PCB image.  You can download the full set from within your customer account.

“What do PCB fabricators do with my data before they make my PCB?”

An understanding of the front-end data preparation process is important for two reasons, speed and cost. PCBs for time-critical applications need to be delivered fast and on time. If information is missing from the data set supplied or if it is ambiguous or unclear we lose time while the issues are sorted out. The new white paper explains how we verify that the data is complete and clear, to make sure that we deliver the board that you want. Above all, it contains tips on how to present clear and unambiguous data and avoid some of the common traps which can delay deliveries.

Our pooling services have been developed to deliver prototype and small batch PCBs cost-effectively as well as fast and on time. The specifications of each service are based on a robust level of manufacturability to ensure the quality of the finished product. This is reflected in the cost structure: TECH pool is more expensive than STANDARD pool. The white paper outlines how we check that each design fits the specification of the chosen service. If it doesn’t, we report back the data issues (raise an exception). Are there simple steps which you as a designer or we as fabricators can take to avoid having to use a more expensive option? If so we will propose them. Are there repairs we can make to bring the board back within specification and improve its manufacturability? In many cases we can make these repairs as part of the data preparation process and the white paper has links to more detailed information. Design for manufacturability tips highlight some critical areas. The white paper also links to the free design rule sets which can be uploaded form our website into EAGLE and Altium CAD systems to help ensure that your design meets the specifications of the most cost-effective pooling service.

Although the white paper follows our internal procedures and includes the names of our front-end data preparation stages, our data preparation process follows industry best-practice. So throughout we relate what we do and our design tips to the wider PCB fabrication world. Our goal is to provide a broad set of technical information which will benefit not just our users but also the wider electronics engineering community across Europe.

Download the Eurocircuits-frontend data preparation white paper in PDF format.

To preserve the environment and to make use of the many embedded links to articles on our web site, we recommended that you read this white paper in its digital form.

Soldermask on via holes

There are 3 ways our customers prepare their layouts with respect to covering via-holes with soldermask:

• Vias open (not covered by soldermask) on both sides of the PCB
• 
• Vias closed (covered with soldermask) on both sides of the PCB
• 
• Vias open from one side and covered from the other side of the PCB
• 

As necessary background information we need to briefly introduce you into the technology of applying soldermask to the boards.

On April 25, ACB organized their technology seminar….Eyes on the future, feet on the ground…

ACB, known in Europe as leading manufacturer of High Technology & Quick Turnaround Printed Circuit Boards, organized its first technology seminar.

The brand new CEO, Gilles Rigon, opened he seminar with explaining all about the ACB philosophy.   “S” for simple and easy solutions where possible, “S” for souple and flexible processes and “S” for Solid and reliable processes and how they balance their “eyes on the future” with their “feet on the ground” approach.  In fact, the importance of this balance would return in many lectures coming.

Large boards and pooling – new guidelines

Over the last 12 months we have received an increasing number of boards in our pooling services at the maximum size allowed 425 x 425 mm.  These are not genuine single circuits but panels made up of many smaller circuits.  To get around our specified maximum panel size 350 x 250 mm, the individual circuits on these oversize panels are not profiled out.  In that way the users can describe the panel as a single circuit, though we know, of course, that they will subsequently cut out the individual circuits.

This practice raises two serious issues.

Overview of our first seminar 22-03-2012 and dates for future seminars.

We started with a warm welcome and the registration of our participants accompanied by a cup of coffee. 19 out of 20 preregistered participants found their way to ARCOSS for our first seminar on reflow soldering of SMD PCB prototypes.

Dirk Stans spoke a word of welcome and gave an overview of the planning for the day. Dirk continued with the Eurocircuits history for the last 20 years followed by a brief overview of Eurocircuits services.

The introduction of the eC-prototype-equipment was the next item on the agenda. Here Dirk explained why Eurocircuits have entered into this venture and explained the two machines eC-stencil-mate and eC-reflow-mate and their specification in detail. Special focus was laid on the difference between reflow chamber soldering and its solder curves and reflow soldering in a throughput oven.

By now your job has already been through two of the three front-end data preparation stages :

• Analysis : we have checked your data to make sure that it complies with the service you have chosen.  If we have found any production issues we have provided you with detailed feedback.
• Single Image : we have rechecked all layers and made them ready for production.

Stage 3 - Make production panels and production tools

We now have a stack of orders that are ready to go into production.

Our business model is based on “order pooling”.  We make our production more efficient by processing several different orders on the same production panel.  More efficient production means lower prices for our customers, especially for prototype and small batch orders. Which orders can be pooled together? This depends on a lot of factors, and finding the right balance is our daily challenge.

We need to consider:

• Delivery term : we separate rush orders from standard delivery orders.  If we put both on the same production panel we could find that all panels have rush orders on them.  If every job becomes urgent, production efficiency goes down and our delivery performance is affected.
• Order size : we keep large and small orders apart.  The higher the number of panels in a job, the longer it takes to process.  Production planning becomes less flexible and again we risk deliveries.
• Copper distribution : we discussed this already in our earlier blogs about our new plating simulation tool and the Elsyca Intellitool Matrix plating project. We need to be sure that the designs we pool together don’t reduce each other’s plating quality.
• Classification/complexity of the boards :  combining complex jobs with simpler jobs means that the final panel is more complex than it need be and so more expensive to produce.  That’s why we have two different pooling services ‘STANDARD pool' for standard boards and  'TECH pool' for more complex boards.
• Technology: some technology options clearly can’t be combined with each other, for example different materials, copper weights and build-ups.  In other cases combinations might reduce production efficiency or quality. For example we could in theory combine boards with different legend colors on a single production panel.  In practice this would need two printing processes and two curing stages.  We would lose time at the print stage and risk the quality if the panel went through too many heating/cooling cycles.

The final decision day by day on which orders are combined on which panel is made by highly skilled and experienced engineers.  They have a growing number of software tools to help them to make the best decisions, and we are investing a lot of manpower and resources to develop even more powerful tools for the future.

Once the engineer has chosen the orders for the panel, how do we make it ready for production?

On March 29 we welcomed the students from the first master year Industrial Engineer from the HELMo ( Haute Ecole Libre Mosane de Gramme- Belgium).

The students came to visit the Eurocircuits production plant in Eger, Hungary

Surface Finishes on printed circuit boards

Then finally, you have finished your design and the moment has come to order the PCB.  You have considered all the important aspects. The DRC check is done and you are relieved: no errors remaining.

The online calculator shows you the default pooling options and offers you the possibility to adjust some of them to your specific need.  En there you bump onto the Surface Finish.  What is Surface Finish and how to make the right choice?

Since all finishes have advantages and disadvantages, it is important to stand still by their application and to check how your boards will be treated during assembly.   The different finishes we offer are Lead-free HAL, Electroless Nickel/Immersion Gold (known as ENIG) and Immersion Silver (ImAg).  All of these are Lead-free and can be used for a RoHS design but also in a SnPb assembly.  Edge connectors can be covered with hard Gold (electroplated Ni/Au).

Have you ever wondered what we are doing to your data when the order status is Single Image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 2 - Single Image data preparation (Single Image and Single Image Cross Check)

We covered before :

• Eurocircuits data preparation - Analysis : the initial stage, checking if the data are complete and no obvious problems are there to fulfill the order.
• Eurocircuits data preparation - Single Image (part I) - drill data and copper layers. : Verify and clean up the drill data and the outer and inner-layers.

This current article, Eurocircuits data preparation - Single Image (part II) - other layers and outputs, is our third article in a series about frontend engineering and is about the preparation of Soldermask, Silk screen (legend), coding on PCB's, making customer panels, machine outputs: "drill layer, rout layer, V-cut layer", SMD paste layers and optional other layers.

Solder-mask preparation

• Replace any painted pads and areas with proper flash pads and polygons as for copper layers
• Check for missing soldermask pads on component holes or fiducials
• Check and add soldermask clearance pads on all non-plated holes
• Check and correct the cover between the edge of the soldermask and the adjacent copper tracks or planes (= Mask Overlap Clearance or MOC) depending on the specification of the pattern class
• Check and correct the clearance between the copper pad and the edge of the soldermask (=Mask Annular Ring or MAR) depending on the specification of the pattern class
• Check and correct the minimum width of the solder-mask bridge between adjacent soldermask pads (=Mask Segment or MSM) depending on the specification of the pattern class
• Save job
• 

Have you ever wondered what we are doing to your data when the order status is Single Image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 2 - Single Image data preparation (Single Image and Single Image Cross Check)

The name “Single Image” may be slightly confusing as it includes both single circuits and customer panels or assembly arrays. We use it to mean what we will deliver to the customer (individual circuit or panelised array) in contrast to our pooled production panels.

Build the job

• load the job data received from Stage 1 (Analysis of PCB CAD data)
• remove everything outside the board outline.
• build a job netlist from the drill and Gerber data. We will use this later to check that we have not made any mistakes during the data preparation. If you have supplied an IPC netlist from your CAD system we will check the job netlist against this at this stage and raise an exception if we find discrepancies.
• save a copy of the layers as received as a reference for later checks.
• load the correct build-up for the job using the material thickness/copper thickness etc specified in the order
• save the job.

Prepare the drill layer(s)

• calculate the Nominal Hole Size. Where our standard tolerances (+/- 0.1 mm) apply, the nominal hole size is the finished hole size specified in the data (e.g. 0.80 mm). Where the designer has specified his own tolerance (e.g. +0.1/-0.00) we will aim to produce a hole in the middle of this tolerance band (so the Nominal Hole Size will be 0.85 mm).
• increase the Nominal Hole Size to the Production Hole Size to accommodate the plating on the hole walls, the mechanical tolerances of the drilling machines etc. This is to ensure that every finished hole size is within tolerance. The rules are:
  • plated holes with finished diameter of 0.45 mm or less (taken to be via holes): increase by 0.1 mm.
  • plated holes with finished diameter of 0.50 mm or more (taken to be component holes): increase by 0.15 mm.
  • non-plated holes: increase by 0.05 mm. This is due to the bounce-back of the laminate: the drilled hole is always slightly smaller than the drill diameter.
• Sort and regroup all drills and slots in the correct functional drill layer.
  • Put all drill and slots – PTH and NPTH - to the first drill run
  • Move any NPTH drill, slot or inner cut-out that is or can be seen as part of the board profile to the profiling run.
  • Move all NPTH drills larger then 6.00mm to the profiling run.
  • Move all NPTH drills and slots that are in a copper area (pad or plane) to the second drill run or the profiling run as per production requirements.

There are 3 possible steps in the production flow where we can drill holes:

• First Drill Run or plated drill layer:
  • This is one of the first steps in production. All holes drilled here will become plated (PTH)
  • unless the hole is being covered with dry film, this process is commonly known as “tenting”
  • or “tented NPTH hole”. Tented NPTH holes MUST have a copper clearance of 0.30mm and can
  • have a maximum size of 6.00mm.
• Second Drill Run or non-plated drill layer:
  • Is performed after the electroless plating process (or blackhole process). All holes here are non-plated (NPTH)
• Profiling run or rout layer:
  • Is the last step where the profiling of the board is done. These holes are also non-plated (NPTH)

Outer Layer preparation

• Clean the data
  • Replace any painted pads and areas with proper flash pads and polygons. Painted features filled with small draws were common in old-fashioned standard Gerber data but are not needed with Extended Gerber where you can define any pad shape or filled area you require.

Have you ever wondered what we are doing to your data when the order status is Analysis or Single image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 1 - Analysis of PCB CAD data (Analysis and Analysis Cross Check)

Analyse the data files

• Sort the data into Gerber files, Excellon drill files and any additional files (doc, txt, pdf, …) If the data comes in CAD format (EAGLE) convert into Gerber files, drill files etc.
• Check the additional files: is there any job information there that is not in the Gerber/Excellon files or in the order (e.g. copper weights, soldermask colours, panel setup, tolerances, layer build-up etc)?

Convert the data into the format used by our data preparation software (DPF)

What is Bow and Twist?

According to the IPC-A-600 standard bow and twist (flatness of the board) is :

“Flatness of printed boards is determined by two characteristics of the product; these are known as bow and twist. The bow condition is characterized by a roughly cylindrical or spherical curvature of the board while its four corners are in the same plane. Twist is the board deformation parallel to the diagonal of the board such that one corner is not in the same plane to the other three. Circular or elliptical boards must be evaluated at the highest point of vertical displacement. Bow and twist may be influenced by the board design as different circuit configurations or layer construction of multilayer printed boards can result in different stress or stress relief conditions. Board thickness and material properties are other factors that influence the resulting board flatness.”

Why is the flatness of a printed circuit board important?

• During the production of the board the flatness of the panels is important for handling and for positioning the panels on the machines
• During the assembly process the flatness of the panels is important for correct solder paste deposition and component mounting
• Flatness is an aspect of the visual quality appearance of the boards.

What are the acceptability criteria for bow and twist?

• For all boards the bow and twist should be 1.5 % or less
• For boards using SMD components ( the majority of the boards) the bow and twist shall be 0.75% or less.

How to measure the bow and twist?

The IPC-TM-650 test methods manual describes the method to calculate bow and twist percentages

What can the PCB designer do to avoid bow and twist?

Eurocircuits'role in the project sets a new competitive standard

Making efficient pooling panels belongs to the core business of Eurocircuits. It is a necessity to ensure cost-effective production of prototypes or small batches. 
Eurocircuits started as a trader of printed circuit boards in 1991. Soon after, in 1993 we got involved in production. It has been our aim from the start to use pooling techniques for a number of reasons :

• Save cost by increasing production efficiency
• Save the environment by reducing waste

The idea of making pooling panels was not new in 1993. On the Benelux market a dutch company was already successfully offering single sided boards in pooling since the eighties of the last century. For double sided boards however it was not that common yet.

When we introduced combination panels for double sided boards in our own production in Hungary there was a lot of resistance from the operators and from the production management. They saw the complexity of their job increase, and technological challenges had to be taken care of.

Now, almost 20 years later, most technology issues have been taken care of, except for one major area, the galvanic copper plating.

For this galvanic process, the design of the PCB plays a vital role in the outcome of the process. In pooling panels there is even an influence of the design of one board on the copper deposition on surrounding designs. That means that we have to be very careful how to build our panel layouts.

The restrictions in panel configuration create limitations that affect the efficiency in our production. As a producer you can look at this problem in two ways:

• Focus on efficiency and accept uneven copper distribution. Also accept that the quality of the PCB's produced for one customer can be influenced by the design of another pcb on the same pooling panel.
• Focus on quality - stick to an even distribution and minimum copper plating thickness all over the panel. Accept that part of the panel surface gets lost because of extra copper areas and spacing introduced to balance out the galvanic layer. Also accept that not all jobs can be pooled with acceptable plating results.

Eurocircuits decided not to take any plating quality risks. We accepted the restrictions dictated by the plating process for a long time.The Elsyca Intellitool matrix copper plating is going to remove these restrictions.