To check the quality of PTH after the galvanic process we measure the Cu plating thickness of several holes on every production panel.
On every production panel we include test coupons. From every production batch we select some coupons and make micro sections of the PTH to check the quality of the PTH in the final PCB.
Effects that we may spot but as Eurocircuits want to avoid in production are:
- Not more than 1 void per test coupon or individual PCB.
- Plating void in excess of 5% of the PCB thickness.
- Voids at the interface of an inner layer.
- Circumferential void in excess of 90° (circumferential crack).
Acceptable on the condition that :
- The hole wall exhibits an otherwise smooth and coherent structure. (A)
- No sign of cracks around the nodule-area. (B)
- The minimum Cu-thickness is fulfilled.
- Do not reduce the hole diameter below the absolute minimum requirements.
Cracks are not acceptable before or after thermal stress, accept for Foil cracks (D)(C) after thermal stress not extending the through plating.
Other typical cracks:
- (E) Barrel crack – not permitted before or after terminal stress.
- (F) Crack around nodule – not permitted before or after terminal stress.
- (G) Crack in inner pad or inner Cu-layer – not permitted before or after terminal stress.
- (H) Foil-crack – is permitted after thermal stress only on outer layers, provided it does not extend through plating.
Permitted if not reducing plating thickness below min
Burrs (A, B) are acceptable if they do not reduce the hole diameter below the required minimum.
Plating separation between laminate and hole wall is acceptable if extending over no more than 40 % of the PCB-thickness (t).
The separation can occur as :
- resin recession around the hole wall (C)
- hole wall pull-away (D)
Inter plane separation
Pink ring (B)
Glass fiber protrusion (C)
Permitted if not reducing hole diameter or Cu-thickness below minimum.
Lifted land (D)
Only allowed after thermal stress or rework simulation
- Permitted if not exceeding 100 micron (A).
- And not reducing min. conductor spacing (B).
Epoxy smear or other form of separation (d-effect) is not allowed between plated hole wall and inner pads
Permitted providing there is no evidence of separation.
Permitted providing there is no evidence of separation
Positive etch back (B)
Etch back of smear and dielectric material : max. 80 micron.
Negative etch back (C)
Smear removal and etch back of internal Cu-foil : max. 25 micron.
No heavy burned surfaces permitted