Designer Insight: partial HDI PCB differential signals FPGA routing

Author: Frank R., CID + FED Designer /
Customer HDI Story 1 - Banner Blog

#1 Design of an FPGA module for video signals

πŸ‘€ About the Author

Frank R., CID + FED Designer

πŸ“ Germany
🎯 Focus: demanding High-density layouts (High speed design)

β€œSignal integrity starts with clean layer transitions.”

πŸ“¦ Project Overview

Design of an FPGA module for video signals

πŸ“ Severely limited installation space
⚑ High-speed differential signals
πŸ“ Precise track length matching required

Image of the front view of a FPGA module for video signals.

βš™οΈ Technical Challenge

πŸ’‘ Objective:

Achieve space-saving routing of differential video signals without backdrilling and without compromising signal integrity.

Design constraints:

  • Vias without stubs
  • Via areas used exclusively for active signal layers
  • Remaining layers fully available for length matching
  • No routing restrictions caused by through vias from other layers
Key layout decision:

The fastest signals were routed from the outer layer to the layer directly below it, sharing the same reference plane.

βœ… Benefits:

  • Selected GND stitching vias could be omitted
  • Additional routing space gained
  • Extensive length matching possible despite limited space
  • No backdrilling required

The small footprint of microvias prevented differential pairs from being forced apart contributing directly to improved signal integrity.

🧩 Engineering Strategy

πŸ”¬ Targeted use of β€œPartial HDI”
  • Microvias only where they create real value
  • No unnecessary HDI complexity
  • Maximum routing density with controlled process effort

High density manageable manufacturing complexity.

🏭 Eurocircuits Contribution

πŸš€ 8-layer pooled build with β€œPartial HDI”
  • Limited additional processing on one inner core
  • Fast prototype turnaround
  • Cost-efficient implementation
πŸ” Design Review in the PCB Visualizer

During the review:

  • Deviations in BGA pad sizes were detected
  • Compared against reference data
  • Corrected and aligned for both library and project

πŸ‘‰ A potential production issue was eliminated early.

Image of HDI inner layer 6,7,8
Internal wiring in the HDI area Layers 6-7-8 (green-violet-blue)

πŸ“Š Result & Benefit

βœ… Low-cost, fast prototype production
βœ… Clearly defined and stable signal behavior
βœ… No backdrilling required
βœ… First version worked immediately

Strategic advantage:

β€œPartial HDI” is also suitable for later cost-efficient series production, as it requires fewer process steps than a fully double-sided HDI solution.

πŸ’¬ Designer’s Opinion

β€œThe Eurocircuits HDI pool solution enabled us to achieve the required project costs and timelines. Thanks to the PCB Visualizer reviews, the first version went into operation immediately.”

🎯 Engineering Principles from This Project

πŸ’‘ Use microvias strategically not universally.
Apply HDI where it improves routing density and signal quality.

πŸ’‘ Plan layer transitions under a shared reference plane.
Clean reference control saves stitching vias and creates routing space.

πŸ’‘ Think β€˜Partial HDI’ before going full HDI.
Targeted complexity often delivers better cost-performance balance.

πŸ’‘ Verify footprints before production release.
Library and project data must match before it becomes expensive.


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