Designer Insight: High pin density with smart BGA optimisation

#2 High pin density without HDI smart BGA optimisation
π€ About the Author
Frank R., CID + FED-Designer
π Germany
π― Specialist in high-density FPGA layouts
βSometimes the best HDI strategy is not using HDI at all.β
π¦ Project Snapshot
FPGA module for video signals
π Limited installation space
π Replacement board
π° Goal: cost-efficient, production-ready solution
βοΈ Technical Challenge
π‘ Situation:
At the time of prototyping, partial HDI pool production was not yet available.
The objective:
- Use standard PCB technology
- Keep costs low
- Still achieve high pin density
Classic trade-off: density vs. cost vs. manufacturability
π§© Engineering Workaround
π¬ Optimising the BGA instead of using HDI
Component used: 0.4 mm pitch BGA, 6×6 (BGA36C40P6X6)
Key design decision:
- Unused pads in the outer rows were intentionally removed
- This opened routing channels on the outer layer
- Inner pads became accessible without HDI
Result: High connection density achieved with a standard 4-layer buildup.

π Eurocircuits Contribution
π 4-layer pooled production in standard technology
- Cost-efficient prototypes
- Production-capable solution
- No HDI process required
π Design Review in the PCB Visualizer
- Deviations from the expected footprint were detected
- Reviewed with the designer
- Confirmed as intentional design strategy
π No correction needed β but full transparency ensured.
π Result & Benefit
β
Production-ready solution
β
Fast prototype turnaround
β
Cost-efficient implementation
β
High pin density without HDI
π¬ Designerβs Opinion
βThe Eurocircuits HDI pool solution was not yet available at the time. Therefore, a manufacturable solution using standard technology was developed.β
π What Other Designers Can Learn
π‘ HDI is not always required
π‘ Component strategy can replace process complexity
π‘ Removing unused pads can unlock routing space
π‘ Design reviews validate even unconventional approaches




